Status:

NOT LOGGED IN Login via SSL New User via SSL

Software

Software Map New Releases Code Snippet Library

OpenEDATools

Site Documentation Project Help Wanted Contact Us

Search

Software/Group People Require All Words

Topic       Analog & Mixed Signal Simulators (0 projects)       ASIC and IC Design (0 projects)       ASIC Physical Synthesis (0 projects)       Cell & Block Characterization (0 projects)       Design Libraries (0 projects)       Documentation Tools (0 projects)       Floor Planners (0 projects)       Formal Verification (0 projects)       HDL Add-In Tools (0 projects)       IC Physical Design Tools (1 projects)       Lef/Def (0 projects)       Library (0 projects)       OpenAccess (1 projects)       Physical Verification (0 projects)       Placement (1 projects)       Python Extensions (0 projects)       SPEF IEEE Std. 1481-1999 (0 projects)       Static Timing (1 projects)       Synthesis (0 projects)       Synthesis Place & Route (0 projects)       Timing Analysis (0 projects)       Training Materials (0 projects)

Browse by:   Topic   Type